Title
High-bandwidth and low-energy on-chip signaling with adaptive pre-emphasis in 90nm CMOS
Abstract
We present circuits for efficient repeaterless on-chip wires. A transmitter sends RZ pulses to a clockless hysteresis receiver using a 3-tap FIR filter to control ISI. Partly overlapped bits double bandwidth using adaptive pre-emphasis. A 90 nm CMOS testchip shows bandwidth density of 4.4 Gb/s/¿m over 5 mm on-chip links with 0.34 pJ/b energy consumption.
Year
DOI
Venue
2010
10.1109/ISSCC.2010.5433993
ISSCC
Keywords
Field
DocType
cmos integrated circuits,clockless hysteresis receiver,transceivers,fir filter,transmitter,on-chip links,isi control,fir filters,on-chip wires,energy consumption,adaptive pre-emphasis,low-energy on-chip signaling,cmos,intersymbol interference,bandwidth,chip,system on a chip,transmitters,hysteresis
Transceiver,Resistive touchscreen,Computer science,Power factor,Electronic engineering,Capacitive sensing,CMOS,Bandwidth (signal processing),Emphasis (telecommunications),Repeater,Electrical engineering
Conference
ISSN
ISBN
Citations 
0193-6530
978-1-4244-6033-5
11
PageRank 
References 
Authors
1.45
3
6
Name
Order
Citations
PageRank
Jae-sun Seo153656.32
Ron Ho263347.76
Jon K. Lexau320931.97
Michael Dayringer4303.74
Dennis Sylvester55295535.53
David Blaauw68916823.47