Yasutoshi Aibara - Citegraph

Author Info

Name	Affiliation	Papers
YASUTOSHI AIBARA	The authors are with Renesas Technology Corp., Takasaki-shi, 370-0021 Japan. E-mail: aibara.yasutoshi@renesas.com	3
Collaborators	Citations	PageRank
12	2	1.14
Referers	Referees	References
11	21	6

Publications (3 rows)

Collaborators (12 rows)

Referers (11 rows)

Referees (21 rows)

Title	Citations	PageRank	Year
A 15 MHz to 600 MHz, 20 mW, 0.38 mm2 Split-Control, Fast Coarse Locking Digital DLL in 0.13 µ m CMOS.	0	0.34	2012
A 15 MHz – 600 MHz, 20 mW, 0.38 mm 2 , fast coarse locking digital DLL in 0.13μm CMOS	0	0.34	2008
A Novel False Lock Detection Technique for a Wide Frequency Range Delay-Locked Loop	2	0.47	2006

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