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JORGE JUAN
Author Info
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Name
Affiliation
Papers
JORGE JUAN
Grupo ID2 (Investigacion y Desarrollo Digital) ETSI Informatica (Tec. Electronica), Universidad de Sevilla, Sevilla, Spain 41012
9
Collaborators
Citations
PageRank
11
7
3.46
Referers
Referees
References
27
64
32
Publications (9 rows)
Collaborators (11 rows)
Referers (27 rows)
Referees (64 rows)
Title
Citations
PageRank
Year
Minimalistic SDHC-SPI hardware reader module for boot loader applications.
0
0.34
2017
Studying The Viability Of Static Complementary Metal-Oxide-Semiconductor Gates With A Large Number Of Inputs When Using Separate Transistor Wells
0
0.34
2011
Fast-Convergence Microsecond-Accurate Clock Discipline Algorithm for Hardware Implementation
0
0.34
2011
Comprehensive Analysis On The Internal Power Dissipation Of Static Cmos Cells In Ultra-Deep Sub-Micron Technologies
0
0.34
2010
Design and implementation of a suitable core for on-chip long-term verification
0
0.34
2010
Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates
0
0.34
2008
Efficient Design and Implementation on FPGA of a MicroBlaze Peripheral for Processing Direct Electrical Networks Measurements
1
0.48
2006
Internode: Internal Node Logic Computational Model
2
0.43
2003
Characterization of Normal Propagation Delay for Delay Degradation Model (DDM)
4
0.53
2002
1