Title
Fast-Convergence Microsecond-Accurate Clock Discipline Algorithm for Hardware Implementation
Abstract
Discrete microprocessor-based equipment is a typical synchronization system on the market which implements the most critical features of the synchronization protocols in hardware and the synchronization algorithms in software. In this paper, a new clock discipline algorithm for hardware implementation is presented, allowing for full hardware implementation of synchronization systems. Measurements on field-programmable gate array prototypes show a fast convergence time (below 10 s) and a high accuracy (1 μs ) for typical configuration parameters.
Year
DOI
Venue
2011
10.1109/TIM.2011.2164828
Instrumentation and Measurement, IEEE Transactions
Keywords
Field
DocType
field programmable gate arrays,microprocessor chips,synchronisation,discrete microprocessor-based equipment,fast-convergence microsecond-accurate clock discipline algorithm,field-programmable gate array,synchronization protocols,Field-programmable gate array,Network Time Protocol (NTP),Precision Time Protocol (PTP),hardware timestamping,synchronization system
Synchronization,Hardware compatibility list,Computer science,Data synchronization,Algorithm,Field-programmable gate array,Clock synchronization,Gate array,Computer hardware,Synchronization (computer science),Self-clocking signal
Journal
Volume
Issue
ISSN
60
12
0018-9456
Citations 
PageRank 
References 
0
0.34
5
Authors
6