Name
Papers
Collaborators
JOSÉ M. MENDÍAS
26
40
Citations 
PageRank 
Referers 
273
19.60
639
Referees 
References 
508
306
Search Limit
100639
Title
Citations
PageRank
Year
A fragmentation aware High-Level Synthesis flow for low power heterogenous datapaths00.342013
Multispeculative additive trees in high-level synthesis30.402013
Multispeculative Addition Applied to Datapath Synthesis.110.702012
Power optimization in heterogenous datapaths.00.342011
Software metadata: Systematic characterization of the memory behaviour of dynamic applications90.682010
Using speculative functional units in high level synthesis50.472010
Subword Switching Activity Minimization to Optimize Dynamic Power Consumption00.342009
Direct memory access usage optimization in network applications for reduced memory latency and energy consumption00.342009
Enabling run-time memory data transfer optimizations at the system level with automated extraction of embedded software metadata information50.472008
Restricted Chaining and Fragmentation Techniques in Power Aware High Level Synthesis20.382008
HW-SW emulation framework for temperature-aware design in MPSoCs231.222007
Multi-processor operating system emulation framework with thermal feedback for systems-on-chip140.822007
Direct memory access optimization in wireless terminals for reduced memory latency and energy consumption30.422007
Automated exploration of pareto-optimal configurations in parameterized dynamic memory allocation for embedded systems90.922006
A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip352.272006
Pre-synthesis optimization of multiplications to improve circuit performance40.442006
Efficient system-level prototyping of power-aware dynamic memory managers for embedded systems150.782006
Systematic dynamic memory management design methodology for reduced memory footprint221.042006
Methodology for Refinement and Optimisation of Dynamic Memory Management for Embedded Systems in Multimedia Applications70.622005
Reducing memory fragmentation with performance-optimized dynamic memory allocators in network applications20.432005
Behavioural Scheduling to Balance the Bit-Level Computational Effort00.342004
Memory-access-aware data structure transformations for embedded software with dynamic data accesses211.112004
An integrated hardware/software approach for run-time scratchpad management813.612004
Source Code Transformation to Improve Conditional Hardware Reuse00.342002
High-level synthesis of multiple-precision circuitsindependent of data-objects length.00.342002
A Unified Algorithm for Mutual Exclusiveness Identification20.451999