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SHINICHI YASUDA
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Name
Affiliation
Papers
SHINICHI YASUDA
Advanced LSI Technology Laboratory, Toshiba Corporation, Kawasaki, Japan
11
Collaborators
Citations
PageRank
28
21
6.57
Referers
Referees
References
70
192
58
Search Limit
100
192
Publications (11 rows)
Collaborators (28 rows)
Referers (70 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
Physically unclonable function using initial waveform of ring oscillators on 65 nm CMOS technology.
0
0.34
2017
Physically Unclonable Function Using an Initial Waveform of Ring Oscillators.
1
0.37
2017
A pure-CMOS nonvolatile multi-context configuration memory for dynamically reconfigurable FPGAs
3
0.42
2014
Designing Nonvolatile Reconfigurable Switch-based FPGA through Overall Circuit Performance Evaluation
0
0.34
2012
High-performance FPGA based on novel DSS-MOSFET and non-volatile configuration memory (abstract only)
0
0.34
2010
Detachable nano-carbon chip with ultra low power
0
0.34
2010
Perspectives and issues in 3D-IC from designers' point of view
1
0.36
2009
1200μm2 Physical Random-Number Generators Based on SiN MOSFET for Secure Smart-Card Application
0
0.34
2008
Compact Fault Recovering Flip-Flop With Adjusting Clock Timing Triggered By Error Detection
6
0.82
2007
Si Nanocrystal MOSFET with Silicon Nitride Tunnel Insulator for High-rate Random Number Generation
1
0.44
2006
Physical random number generator based on MOS structure after soft breakdown
9
2.47
2004
1