Low temperature multi-layer wafer level package for chip scale atomic clock (CSAC) | 0 | 0.34 | 2015 |
A SOI sandwich differential capacitance accelerometer with low-stress package | 0 | 0.34 | 2014 |
Design of a novel low cross-axis sensitivity micro-gravity sandwich capacitance accelerometer | 0 | 0.34 | 2011 |
Design and fabrication of a mems capacitive accelerometer based on double-device-layers SOI wafer | 0 | 0.34 | 2010 |