Ho Joon Lee - Citegraph

Author Info

Name	Affiliation	Papers
HO JOON LEE	Northeastern Univ, Dept Elect & Comp Engn, 360 Huntington Ave, Boston, MA 02115 USA	6
Collaborators	Citations	PageRank
4	13	4.08
Referers	Referees	References
43	63	19

Publications (6 rows)

Collaborators (4 rows)

Referers (43 rows)

Referees (63 rows)

Title	Citations	PageRank	Year
A process tolerant semi-self impedance calibration method for LPDDR4 memory controller	1	0.44	2015
A low power high resolution digital PWM with process and temperature calibrations for digital controlled DC-DC converters	1	0.43	2014
An area efficient low power high speed S-Box implementation using power-gated PLA	0	0.34	2014
Low power Null Convention Logic circuit design based on DCVSL	3	0.40	2013
On-chip HBD sensor for nanoscale CMOS technology	1	0.36	2012
Analysis of time dependent dielectric breakdown in nanoscale CMOS circuits	7	2.11	2011

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