Andreas Weichslgartner - Citegraph

Author Info

Name	Affiliation	Papers
ANDREAS WEICHSLGARTNER	Univ Erlangen Nurnberg, Erlangen, Germany	18
Collaborators	Citations	PageRank
53	52	7.16
Referers	Referees	References
129	484	225

Search Limit

100484

Publications (18 rows)

Collaborators (53 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Symmetry-Eliminating Design Space Exploration for Hybrid Application Mapping on Many-Core Architectures.	11	0.48	2018
A Design-Time/Run-Time Application Mapping Methodology for Predictable Execution Time in MPSoCs.	1	0.35	2018
Efficient task spawning for shared memory and message passing in many-core architectures.	0	0.34	2017
Design-Time/Run-Time Mapping of Security-Critical Applications in Heterogeneous MPSoCs.	5	0.40	2016
Providing Fault Tolerance Through Invasive Computing	0	0.34	2016
Providing Security On Demand Using Invasive Computing	0	0.34	2016
Language and Compilation of Parallel Programs for -Predictable MPSoC Execution Using Invasive Computing	0	0.34	2016
Invasive Computing For Timing-Predictable Stream Processing On Mpsocs	1	0.35	2016
Fault-tolerant communication in invasive networks on chip	3	0.36	2015
Network Interface With Task Spawning Support For Noc-Based Dsm Architectures	1	0.36	2015
Design Methodology and Run-Time Management for Predictable Many-Core Systems	2	0.41	2015
The Invasive Network on Chip - A Multi-Objective Many-Core Communication Infrastructure.	6	0.53	2014
AUTO-GS: Self-Optimization of NoC Traffic through Hardware Managed Virtual Connections	0	0.34	2013
NoC simulation in heterogeneous architectures for PGAS programming model.	1	0.36	2013
Hardware Supported Adaptive Data Collection for Networks on Chip	1	0.36	2013
Virtual networks -- distributed communication resource management	3	0.42	2013
Hardware-assisted Decentralized Resource Management for Networks on Chip with QoS	6	0.50	2012
Dynamic decentralized mapping of tree-structured applications on NoC architectures	11	0.59	2011

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