Name
Affiliation
Papers
MATTHIAS FÜGGER
TU Wien
49
Collaborators
Citations 
PageRank 
48
167
21.14
Referers 
Referees 
References 
243
683
631
Search Limit
100683
Title
Citations
PageRank
Year
The Involution Tool for Accurate Digital Timing and Power Analysis00.342021
Distributed Computation with Continual Population Growth00.342020
PALS: Plesiochronous and Locally Synchronous Systems10.382020
On the radius of nonsplit graphs and information dissemination in dynamic networks00.342019
Fast All-Digital Clock Frequency Adaptation Circuit for Voltage Droop Tolerance10.362018
Tight Bounds for Asymptotic and Approximate Consensus.10.362018
A Faithful Binary Circuit Model With Adversarial Noise00.342018
Metastability-Containing Circuits.30.432018
Fast Multidimensional Asymptotic and Approximate Consensus.00.342018
Metastability Tolerant Computing00.342017
New transience bounds for max-plus linear systems.00.342017
Metastability-Aware Memory-Efficient Time-to-Digital Converters10.372017
Brief Announcement: Lower Bounds for Asymptotic Consensus in Dynamic Networks.00.342017
Multidimensional Asymptotic Consensus in Dynamic Networks.00.342016
Unfaithful Glitch Propagation in Existing Binary Circuit Models60.682016
Fast, Robust, Quantizable Approximate Consensus.20.382016
Approximate Consensus in Highly Dynamic Networks: The Role of Averaging Algorithms160.792015
Fault-tolerant Distributed Systems in Hardware.40.442015
Towards binary circuit models that faithfully capture physical solvability20.412015
Diffusive clock synchronization in highly dynamic networks10.342015
A Proof of the Convergence of the Hegselmann-Krause Dynamics on the Circle.00.342015
Experimental Validation of a Faithful Binary Circuit Model20.432015
Time Complexity of Link Reversal Routing20.382015
Amortized Averaging Algorithms for Approximate Consensus.00.342015
Rigorously modeling self-stabilizing fault-tolerant circuits: An ultra-robust clocking scheme for systems-on-chip40.422014
Runtime verification of embedded real-time systems130.672014
Faithful Glitch Propagation in Binary Circuit Models.20.422014
Approximate Consensus in Highly Dynamic Networks.60.442014
Transience bounds for distributed algorithms50.442013
The Effect of Forgetting on the Performance of a Synchronizer.10.392013
HEX: scaling honeycombs is easier than scaling clock trees10.352013
Efficient Construction of Global Time in SoCs Despite Arbitrary Faults30.392013
Reconciling fault-tolerant distributed computing and systems-on-chip.140.652012
New Transience Bounds for Long Walks10.362012
Real-Time Runtime Verification on Chip.100.612012
Brief announcement: the degrading effect of forgetting on a synchronizer00.342012
FATAL+: A Self-Stabilizing Byzantine Fault-tolerant Clocking Scheme for SoCs00.342012
Efficient checking of link-reversal-based concurrent systems10.352012
On the Transience of Linear Max-Plus Dynamical Systems30.402011
Full reversal routing as a linear dynamical system70.592011
Fault-tolerant algorithms for tick-generation in asynchronous logic: Robust pulse generation40.412011
Fault-Tolerant Algorithms for Tick-Generation in Asynchronous Logic: Robust Pulse Generation - [Extended Abstract].70.502011
On the performance of a retransmission-based synchronizer00.342011
Partial is full60.502011
How to Speed-Up Fault-Tolerant Clock Generation in VLSI Systems-on-Chip via Pipelining40.442010
Brief announcement: how to speed-up fault-tolerant clock generation in VLSI systems-on-chip via pipelining10.352009
On the Threat of Metastability in an Asynchronous Fault-Tolerant Clock Generation Scheme120.752009
Mapping a Fault-Tolerant Distributed Algorithm to Systems on Chip00.342008
Fault-Tolerant Distributed Clock Generation in VLSI Systems-on-Chip200.852006