| An exact measurement and repair circuit of TSV connections for 128GB/s high-bandwidth memory(HBM) stacked DRAM | 3 | 1.19 | 2014 |
| 25.2 A 1.2V 8Gb 8-channel 128GB/s high-bandwidth memory (HBM) stacked DRAM with effective microbump I/O test methods using 29nm process and TSV | 48 | 2.07 | 2014 |
| 25.3 A 1.35V 5.0Gb/s/pin GDDR5M with 5.4mW standby power and an error-adaptive duty-cycle corrector | 3 | 0.45 | 2014 |
| A low-power small-area open loop digital DLL for 2.2Gb/s/pin 2Gb DDR3 SDRAM | 0 | 0.34 | 2011 |
