| Wide-Range Many-Core SoC Design in Scaled CMOS: Challenges and Opportunities | 0 | 0.34 | 2021 |
| Session 12 Overview: Innovations in Low-Power and Secure IoT | 0 | 0.34 | 2021 |
| An Energy-Efficient Graphics Processor in 14-nm Tri-Gate CMOS Featuring Integrated Voltage Regulators for Fine-Grain DVFS, Retentive Sleep, and <inline-formula> <tex-math notation="LaTeX">${V}_{\text{MIN}}$ </tex-math></inline-formula> Optimization | 2 | 0.38 | 2019 |
| Introduction to the Special Section on the 2019 IEEE International Solid-State Circuits Conference (ISSCC) | 0 | 0.34 | 2019 |
| Near Threshold Voltage (NTV) Computing: Computing in the Dark Silicon Era. | 2 | 0.41 | 2017 |
| An energy harvesting wireless sensor node for IoT systems featuring a near-threshold voltage IA-32 microcontroller in 14nm tri-gate CMOS. | 2 | 0.38 | 2016 |
| Test implications and challenges in near threshold computing special session | 0 | 0.34 | 2016 |
| A solar-powered 280mV-to-1.2V wide-operating-range IA-32 processor | 0 | 0.34 | 2014 |
| A 280mV-to-1.2V wide-operating-range IA-32 processor in 32nm CMOS. | 66 | 4.47 | 2012 |
| A 2 Tb/S 6 4 Mesh Network For A Single-Chip Cloud Computer With Dvfs In 45 Nm Cmos | 51 | 1.86 | 2011 |
| A 48-Core IA-32 Processor in 45 nm CMOS Using On-Die Message-Passing and DVFS for Performance and Power Scaling | 217 | 7.14 | 2011 |
| Within-Die Variation-Aware Dynamic-Voltage-Frequency-Scaling With Optimal Core Allocation and Thread Hopping for the 80-Core TeraFLOPS Processor | 64 | 2.21 | 2011 |
| Guest Editors' Introduction: Promises and Challenges of Novel Interconnect Technologies | 0 | 0.34 | 2010 |
| A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS | 312 | 13.00 | 2010 |
| The 48-core SCC Processor: the Programmer's View | 124 | 6.02 | 2010 |
| Within-die variation-aware dynamic-voltage-frequency scaling core mapping and thread hopping for an 80-core processor. | 19 | 1.14 | 2010 |
| A 90mW/GFlop 3.4GHz Reconfigurable Fused/Continuous Multiply-Accumulator for Floating-Point and Integer Operands in 65nm | 7 | 0.57 | 2010 |
| An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS | 311 | 12.64 | 2008 |
| A 5-GHz Mesh Interconnect for a Teraflops Processor | 319 | 13.60 | 2007 |
| Adaptive Frequency and Biasing Techniques for Tolerance to Dynamic Temperature-Voltage Variations and Aging | 49 | 5.28 | 2007 |
| An 80-Tile 1.28TFLOPS Network-on-Chip in 65nm CMOS. | 254 | 28.24 | 2007 |
| A 6.2-GFlops Floating-Point Multiply-Accumulator With Conditional Normalization | 30 | 11.84 | 2006 |
| A TCP offload accelerator for 10 Gb/s Ethernet in 90-nm CMOS | 28 | 3.32 | 2003 |
