| Design and evaluation of an energy-efficient dynamically reconfigurable architecture for wireless sensor nodes | 6 | 0.77 | 2009 |
| On the design of reconfigurable multipliers for integer and Galois field multiplication | 5 | 0.58 | 2009 |
| Towards a unique FPGA-based identification circuit using process variations | 13 | 1.77 | 2009 |
| An integrated tool flow to realize runtime-reconfigurable applications on a new class of partial multi-context FPGAs | 3 | 0.43 | 2009 |
| Coarse-grained reconfiguration | 0 | 0.34 | 2008 |
| A Methodology for Wireless Sensor Network Prototyping with Sophisticated Debugging Support | 2 | 0.39 | 2008 |
| A scalable reconfiguration mechanism for fast dynamic reconfiguration | 3 | 0.52 | 2008 |
| Application-specific reconfigurable processors | 0 | 0.34 | 2008 |
| An area-efficient FPGA realisation of a codebook-based image compression method | 0 | 0.34 | 2008 |
| A Domain-Specific Dynamically Reconfigurable Hardware Platform for Wireless Sensor Networks | 3 | 0.46 | 2007 |
| On the Design of a Reconfigurable Multiplier for Integer and Galois Field Multiplication | 0 | 0.34 | 2007 |
| A Power Estimation Model For An Fpga-Based Softcore Processor | 2 | 0.39 | 2007 |
| Low-Complexity Adaptive Encoding Schemes Based on Partial Bus-Invert for Power Reduction in Buses Exhibiting Capacitive Coupling | 0 | 0.34 | 2007 |
| Dynamically Reconfigurable Computing For Wireless Communication Systems | 0 | 0.34 | 2007 |
| A Customizable LEON2-Based VLIW Processor | 0 | 0.34 | 2007 |
| Multitasking Support for Dynamically Reconfig Urable Systems | 1 | 0.52 | 2006 |
| Design Concepts for a Dynamically ReconfigurableWireless Sensor Node | 5 | 0.65 | 2006 |
| A metric for the energy-efficiency of dynamically reconfigurable systems | 1 | 0.40 | 2006 |
| Exploring Functional Unit Parallelism in Reconfigurable Computing Platforms | 0 | 0.34 | 2006 |
| A Concept for a Profile-based Dynamic Reconfiguration Mechanism | 0 | 0.34 | 2006 |
| Prozessorintegration und Speicheranbindung dynamisch rekonfigurierbarer Funktionseinheiten | 3 | 0.50 | 2005 |
| Reconfigurable embedded systems: an application-oriented perspective on architectures and design techniques | 4 | 0.41 | 2005 |
| An Asynchronous Switch Implmentation for Systems-on-a-Chip. | 0 | 0.34 | 2004 |
| A switch architecture and signal synchronization for GALS system-on-chips | 3 | 0.52 | 2004 |
