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DIMITRA PAPAGIANNOPOULOU
Author Info
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Name
Affiliation
Papers
DIMITRA PAPAGIANNOPOULOU
Brown University, Providence, RI
9
Collaborators
Citations
PageRank
12
26
3.62
Referers
Referees
References
78
263
120
Search Limit
100
263
Publications (9 rows)
Collaborators (12 rows)
Referers (78 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
Ignoretm: Opportunistically Ignoring Timing Violations For Energy Savings Using Htm
0
0.34
2019
Hardware Transactional Memory Exploration in Coherence-Free Many-Core Architectures.
0
0.34
2018
Edge-TM: Exploiting Transactional Memory for Error Tolerance and Energy Efficiency.
13
0.59
2017
Evaluating critical bits in arithmetic operations due to timing violations
1
0.35
2017
Thrifty-malloc: A HW/SW codesign for the dynamic management of hardware transactional memory in embedded multicore systems.
1
0.39
2016
Energy-Efficient and High-Performance Lock Speculation Hardware for Embedded Multicore Systems
3
0.41
2015
Playing with Fire: Transactional Memory Revisited for Error-Resilient and Energy-Efficient MPSoC Execution
4
0.43
2015
Transparent and energy-efficient speculation on NUMA architectures for embedded MPSoCs
0
0.34
2013
NBTI-Aware Data Allocation Strategies for Scratchpad Based Embedded Systems
4
0.44
2012
1