New Generation Dynamically Reconfigurable Processor Technology for Accelerating Embedded AI Applications | 0 | 0.34 | 2018 |
Optimizing Time And Space Multiplexed Computation In A Dynamically Reconfigurable Processor | 2 | 0.49 | 2013 |
Iterative Synthesis Methods Estimating Programmable-Wire Congestion In A Dynamically Reconfigurable Processor | 0 | 0.34 | 2011 |
High-level Synthesis Challenges for Mapping a Complete Program on a Dynamically Reconfigurable Processor. | 1 | 0.48 | 2010 |
Wire congestion aware synthesis for a dynamically reconfigurable processor | 0 | 0.34 | 2010 |
An Adaptive Viterbi Decoder On The Dynamically Reconfigurable Processor | 2 | 0.43 | 2006 |
High-Level Synthesis Challenges and Solutions for a Dynamically Reconfigurable Processor | 27 | 1.44 | 2006 |