Name
Affiliation
Papers
VIVEK TIWARI
Intel
35
Collaborators
Citations 
PageRank 
64
2971
391.08
Referers 
Referees 
References 
5081
387
178
Search Limit
1001000
Title
Citations
PageRank
Year
Iris Liveness Detection Using Fusion of Domain-Specific Multiple BSIF and DenseNet Features00.342022
Iris Presentation Attack Detection Based On Best-Kfeature Selection From Yolo Inspired Roi00.342021
CCRNet: a novel data-driven approach to improve cross-domain Iris recognition.00.342020
A Binary Classification Approach for Time Granular Traffic in SDWMN based IoT Networks00.342020
TD2SecIoT: Temporal, Data-Driven and Dynamic Network Layer Based Security Architecture for Industrial IoT.00.342020
Enhancing human iris recognition performance in unconstrained environment using ensemble of convolutional and residual deep neural network models00.342020
Biometric spoofing: Iris presentation attack detection and contact lens discrimination through score-level fusion00.342020
Ensemble of Customized DenseNet with SVM for Refining Iris Contact Lens Features.00.342019
An approach for iris contact lens detection and classification using ensemble of customized DenseNet and SVM00.342019
PrIA: A Private Intelligent Assistant.10.352017
Improving Accuracy for Intrusion Detection through Layered Approach Using Support Vector Machine with Feature Reduction10.362016
Pattern Retrieval through Classification from Pattern Warehouse: Issues and Challenges10.352014
Computational Analysis of .NET Remoting and Mobile agent in Distributed Environment00.342010
LACAS: learning automata-based congestion avoidance scheme for healthcare wireless sensor networks421.482009
Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005, San Diego, California, USA, August 8-10, 20057413.342005
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004, Newport Beach, California, USA, August 9-11, 20047124.722004
Ecological Optimization and Parametric Study of an Irreversible Regenerative Modified Brayton Cycle with Isothermal Heat Addition30.902003
Topological Analysis for Leakage Prediction of Digital Circuits122.342002
A Systematic Approach for System Bus Load Reduction Applied to Medical Imaging10.362001
A Systematic Approach to Reduce the System Bus Load and Power in Multimedia Algorithms20.442001
Do our low-power tools have enough horse power? (panel session) (title only)00.342000
Inductive noise reduction at the architectural level171.432000
Wattch: a framework for architectural-level power analysis and optimizations1641131.362000
Macro-driven circuit design methodology for high-performance datapaths20.382000
An architectural solution for the inductive noise problem due to clock-gating233.541999
Reducing power in high-performance microprocessors14924.211998
Dynamic Power Management for Microprocessors: A Case Study172.191997
Power analysis and minimization techniques for embedded DSP software10612.401997
Instruction level power analysis and optimization of software25439.371996
Technology mapping for low power in logic synthesis40.611996
Power analysis and low-power scheduling techniques for embedded DSP software2311.841995
Power analysis of a 32-bit embedded microcontroller3426.981995
Power analysis of embedded software: a first step towards software power minimization42658.711994
A Split Data Cache For Superscalar Processors30.951993
Technology mapping for lower power6428.741993