Title
A Systematic Approach to Reduce the System Bus Load and Power in Multimedia Algorithms
Abstract
Multimedia algorithms deal with enormous amounts of data transfers and storage, resulting in huge bandwidth requirements at the off-chip memory and system bus level. As a result the related energy consumption becomes critical. Even for execution time the bottleneck can shift from the CPU to the external bus load. This paper demonstrates a systematic software approach to reduce this system bus load. It consists of source-to-source code transformations, that have to be applied before the conventional ILP compilation. To illustrate this we use a cavity detection algorithm for medical imaging, that is mapped on an Intel Pentium (R) II processor.
Year
DOI
Venue
2001
10.1155/2001/61965
VLSI DESIGN
Keywords
Field
DocType
multimedia,memory optimization,low-power design,bandwidth reduction,bus load reduction,medical imaging
Bottleneck,Computer science,Real-time computing,Address bus,Electronic engineering,Back-side bus,System bus,Central processing unit,External Bus Interface,Algorithm,Local bus,Multimedia,Embedded system,Control bus
Journal
Volume
Issue
ISSN
12
2
1065-514X
Citations 
PageRank 
References 
2
0.44
13
Authors
5
Name
Order
Citations
PageRank
Koen Danckaert19210.11
Chidamber Kulkarni212315.18
Francky Catthoor33932423.30
Vivek Tiwari48116.52
Vivek Tiwari52971391.08