Paper Info
Title
Ultra-Robust Null Convention Logic Circuit with Emerging Domain Wall Devices.
Abstract
Despite many attractive advantages, Null Convention Logic (NCL) remains to be a niche largely due to its high imple- mentation costs. Using emerging spintronic devices, this paper proposes a Domain-Wall-Motion-based NCL circuit design methodology that achieves approximately 30x and 8x improvements in energy efficiency and chip layout area, respectively, over its equivalent CMOS design, while main- taining similar delay performance for a 32-bit full adder. These advantages are made possible mostly by exploiting the domain wall motion physics to natively realize the hys- teresis critically needed in NCL. More Interestingly, this de- sign choice achieves ultra-high robustness by allowing spin- tronic device parameters to vary within a predetermined range while still achieving correct operations.
Year
DOI
Venue
2016
10.1145/2902961.2903019
ACM Great Lakes Symposium on VLSI
Keywords
Field
DocType
Spintronics and magnetic technologies, NULL Convention Logic, Asynchronous circuit
Logic gate,Adder,Computer science,Logic optimization,Circuit extraction,Circuit design,Robustness (computer science),Electronic engineering,Register-transfer level,Asynchronous circuit
Conference
ISBN
Citations 
PageRank 
978-1-5090-2979-2
2
0.40
References 
Authors
5
4
Name
Order
Citations
PageRank
Yu Bai1148.86
Bo Hu220.40
Weidong Kuang3706.95
Mingjie Lin47325.04