Qingsheng Hu - Citegraph

Author Info

Name	Affiliation	Papers
QINGSHENG HU	Southeast Univ, Inst RF & OE ICs, Nanjing 210096, Peoples R China	15
Collaborators	Citations	PageRank
24	10	5.52
Referers	Referees	References
33	111	37

Search Limit

100111

Publications (15 rows)

Collaborators (24 rows)

Referers (33 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Dfe Error Propagation And Fec Interleaving For 400gbe Pam4 Electrical Lane	0	0.34	2020
DFE Error Propagation and FEC Interleaving for 400GbE PAM4 Electrical Lane.	0	0.34	2020
An Effective Differential Power Attack Method for Advanced Encryption Standard	0	0.34	2019
Grouping-Based Extended Discontinuous Reception with Adjustable eDRX Cycles for Smart Grid	0	0.34	2019
A 33 Gb/S Combined Adaptive Ctle And Half-Rate Look-Ahead Dfe In 0.13 Mu M Bicmos Technology For Serial Link	0	0.34	2018
Two Improved Algorithms For Layered Qc-Ldpc Decoding Algorithm	0	0.34	2018
A 40 Gb/S Pam4 Serdes Receiver In 65nm Cmos Technology	0	0.34	2018
A 6.25Gb/s feed-forward equaliser in 0.18μm CMOS using delay locked loop with load calibration	0	0.34	2014
A 6.25Gbps Feed-forward Equalizer in 0.18μm CMOS Technology for SerDes.	0	0.34	2012
A high-speed and low-power up/down counter in 0.18-μm CMOS technology	1	0.37	2012
Design And Implementation Of High-Speed Input-Queued Switches Based On A Fair Scheduling Algorithm	0	0.34	2010
A Programmable Frequency Divider in 0.18µm CMOS Library	1	0.35	2008
Low complexity parallel Chien search architecture for RS decoder	7	0.70	2005
Stable and practical scheduling algorithms for high speed virtual output queuing switches	1	0.39	2003
Distributed algorithm for multi-region problem in BEM	0	0.34	1999

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