Name
Affiliation
Papers
HYUN-SEOK LEE
Chungbuk Natl Univ, Dept Elect Engn, Cheongju 361763, Chungbuk, South Korea
25
Collaborators
Citations 
PageRank 
61
248
25.22
Referers 
Referees 
References 
640
326
122
Search Limit
100640
Title
Citations
PageRank
Year
Multi-objective design of thickness and curvature of a bendable structure considering delamination and strength characteristics.00.342019
Reducing Energy of Baseband Processor for IoT Terminals with Long Range Wireless Communications00.342018
WISCA SDR network.00.342017
Using Graphics Processing Units in an LTE Base Station30.382015
Radar Cross-Section Prediction Based On Shooting And Bouncing Rays Using Line Tracing Method00.342014
Implementation Of The Chien Search Algorithm On A Baseband Processor00.342012
Performance Analysis of Forward Link Transmit Power Control during Soft Handoff in Mobile Cellular Systems00.342011
Energy Saving Method for Wi-Fi Stations Based on Partial Virtual Bitmap10.352011
An Alternative Memory Access Scheduling in Manycore Accelerators40.472011
A Low-Power DSP for Wireless Communications141.062010
Power, interface, and integration: handset chipset design issues30.412009
SODA: A High-Performance DSP Architecture for Software-Defined Radio432.112007
A Communication Module Using Message Queue for a Process Automation System of the Industry Environment00.342007
The next generation challenge for software defined radio141.042007
Signal Detection Using Log-Likelihood Ratio Based Sorting QR Decomposition for V-BLAST Systems00.342007
SODA: A Low-power Architecture For Software Radio1289.672006
Reducing Idle Mode Power in Software Defined Radio Terminals10.362006
Code-Division Multiplexing Based MIMO Channel Sounder with Loosely Synchronous Codes and Kasami Codes50.732006
Software defined radio – a high performance embedded challenge142.012005
Traffic-Adaptive energy efficient medium access control for wireless sensor networks00.342005
A dual-processor solution for the MAC layer of a software defined radio terminal20.372005
A 1.8-V 128-Mb mobile DRAM with double boosting pump, hybrid current sense amplifier, and dual-referenced adjustment scheme for temperature sensor111.422003
Analysis of switching characteristics of the digital hybrid PLL frequency synthesizer00.342003
Analysis and minimization of phase noise of the digital hybrid PLL frequency synthesizer40.842002
A new triple-controlled type frequency synthesizer using simplified DDFS-driven digital hybrid PLL system10.632002