| Evaluating the Security of Delay-Locked Circuits | 0 | 0.34 | 2021 |
| Invited: Independent Verification and Validation of Security-Aware EDA Tools and IP | 0 | 0.34 | 2021 |
| Robust and Attack Resilient Logic Locking with a High Application-Level Impact | 1 | 0.35 | 2021 |
| Trace Logic Locking: Improving the Parametric Space of Logic Locking | 0 | 0.34 | 2021 |
| A Survey on Neural Trojans | 2 | 0.39 | 2020 |
| Keynote: A Disquisition on Logic Locking | 8 | 0.52 | 2020 |
| Strong Anti-SAT: Secure and Effective Logic Locking | 4 | 0.41 | 2020 |
| GANRED: GAN-based Reverse Engineering of DNNs via Cache Side-Channel | 2 | 0.37 | 2020 |
| Secure and Effective Logic Locking for Machine Learning Applications. | 0 | 0.34 | 2019 |
| A Combined Optimization-Theoretic and Side- Channel Approach for Attacking Strong Physical Unclonable Functions. | 0 | 0.34 | 2018 |
| A Current-Mode Sigma Delta Ad Based Integrated Potentiostat | 0 | 0.34 | 2018 |
| TimingSAT: timing profile embedded SAT attack | 4 | 0.37 | 2018 |
| Neural Trojans. | 0 | 0.34 | 2017 |
| An optimization-theoretic approach for attacking physical unclonable functions. | 2 | 0.39 | 2016 |
| Quantization noise consideration and characterization in Sigma-Delta MEMS accelerometer. | 0 | 0.34 | 2016 |
| A dual-exposure wide dynamic range CMOS image sensor with 12 bit column-parallel incremental sigma-delta ADC. | 2 | 0.38 | 2016 |
| 2.5D/3D Integration Technologies for Circuit Obfuscation | 0 | 0.34 | 2016 |
| A Dual-Channel Wide Input Range Interface Circuit For Electrochemical Amperometric Sensors | 0 | 0.34 | 2015 |
| A low power dissipation high-speed CMOS image sensor with column-parallel sigma-delta ADCs | 1 | 0.40 | 2015 |
| A high dynamic range analog-front-end IC for electrochemical amperometric and voltammetric sensors | 3 | 0.47 | 2015 |
