Title
Trace Logic Locking: Improving the Parametric Space of Logic Locking
Abstract
To protect against an untrusted foundry, logic locking must 1) inject sufficient error to ensure critical application failures for any wrong key (error severity) and 2) resist any attack against it (attack resilient). We begin our work by deriving a fundamental tradeoff between these two goals which exists underlying all logic locking, regardless of construction. This relationship forces integrate...
Year
DOI
Venue
2021
10.1109/TCAD.2020.3025135
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Keywords
DocType
Volume
Resilience,Art,Foundries,Integrated circuit modeling,Security,Error analysis
Journal
40
Issue
ISSN
Citations 
8
0278-0070
0
PageRank 
References 
Authors
0.34
0
3
Name
Order
Citations
PageRank
Michael Zuzak112.12
Yun-Tao Liu2297.42
Ankur Srivastava390279.64