Title | Citations | PageRank | Year |
---|---|---|---|
Design of a multi-style and multi-frequency FPGA | 0 | 0.34 | 2016 |
Qualifying Relative Timing Constraints for Asynchronous Circuits | 3 | 0.39 | 2016 |
Reconfigurable circuit for implementation of family of 4-phase latch protocols | 0 | 0.34 | 2016 |