| Reduced Precision DWC: An Efficient Hardening Strategy for Mixed-Precision Architectures | 2 | 0.42 | 2022 |
| STAP: An Architecture and Design Tool for Automata Processing on Memristor TCAMs | 0 | 0.34 | 2022 |
| Accelerating Convolutional Neural Networks in FPGA-based SoCs using a Soft-Core GPU. | 0 | 0.34 | 2021 |
| AITIA: Embedded AI Techniques for Industrial Applications | 0 | 0.34 | 2021 |
| Aging-Aware Parallel Execution | 0 | 0.34 | 2021 |
| Multi-Target Adaptive Reconfigurable Acceleration for Low-Power IoT Processing | 0 | 0.34 | 2021 |
| A Modular Software Library for Effective High Level Synthesis of Convolutional Neural Networks. | 0 | 0.34 | 2020 |
| MCEA: A Resource-Aware Multicore CGRA Architecture for the Edge | 0 | 0.34 | 2020 |
| Investigating Floating-Point Implementations in a Softcore GPU under Radiation-Induced Faults. | 0 | 0.34 | 2020 |
| Reduced-Precision DWC for Mixed-Precision GPUs | 0 | 0.34 | 2020 |
| TIRUB: A Safety and Energy-Aware Scheduling Algorithm | 0 | 0.34 | 2020 |
| (Special Topic Submission) Enabling Domain-Specific Architectures with an Open-Source Soft-Core GPGPU | 0 | 0.34 | 2020 |
| A Survey on Machine Learning Approaches to ECG Processing | 0 | 0.34 | 2020 |
| Proactive Aging Mitigation In Cgras Through Utilization-Aware Allocation | 0 | 0.34 | 2020 |
| Endurance-Aware RRAM-Based Reconfigurable Architecture using TCAM Arrays | 0 | 0.34 | 2020 |
| AITIA: Embedded AI Techniques for Embedded Industrial Applications | 0 | 0.34 | 2020 |
| Data clustering for efficient approximate computing | 0 | 0.34 | 2020 |
| Improving Software-based Techniques for Soft Error Mitigation in OoO Superscalar Processors | 0 | 0.34 | 2019 |
| Transrec: Improving Adaptability In Single-Isa Heterogeneous Systems With Transparent And Reconfigurable Acceleration | 2 | 0.37 | 2019 |
| Power-Aware Phase Oriented Reconfigurable Architecture. | 0 | 0.34 | 2019 |
| A Knapsack Methodology for Hardware-based DMR Protection against Soft Errors in Superscalar Out-of-Order Processors | 0 | 0.34 | 2019 |
| Generating Optimized Multicore Accelerator Architectures | 0 | 0.34 | 2019 |
| A Runtime Power-Aware Phase Predictor for CGRAs | 0 | 0.34 | 2019 |
| Predicting performance in multi-core systems with shared reconfigurable accelerators. | 0 | 0.34 | 2019 |
| BRAM-based function reuse for multi-core architectures in FPGAs. | 0 | 0.34 | 2018 |
| Accelerating error-tolerant applications with approximate function reuse. | 2 | 0.39 | 2018 |
| Efficient Local Memory Support for Approximate Computing | 0 | 0.34 | 2018 |
| A Low-Cost BRAM-Based Function Reuse for Configurable Soft-Core Processors in FPGAs. | 1 | 0.36 | 2018 |
| A Mechanism for energy-efficient reuse of decoding and scheduling of x86 instruction streams. | 0 | 0.34 | 2017 |
| The Potential of Accelerating Image-Processing Applications by Using Approximate Function Reuse. | 0 | 0.34 | 2016 |
| A Multiple-ISA Reconfigurable Architecture | 0 | 0.34 | 2013 |
