Author Info
Name
Affiliation
Papers
LUCA AVALLONE
School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland
4
Collaborators
Citations 
PageRank 
17
9
1.51
Referers 
Referees 
References 
33
0
0
Title
Citations
PageRank
Year
A 12.9-To-15.1ghz Digital Pll Based On A Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping Achieving 107.6fs Integrated Jitter00.342021
A 98.4fs-Jitter 12.9-To-15.1ghz Pll-Based Lo Phase-Shifting System With Digital Background Phase-Offset Correction For Integrated Phased Arrays00.342021
A Comprehensive Phase Noise Analysis of Bang-Bang Digital PLLs60.462021
Jitter Minimization in Digital PLLs with Mid-Rise TDCs30.382020