Title
A 98.4fs-Jitter 12.9-To-15.1ghz Pll-Based Lo Phase-Shifting System With Digital Background Phase-Offset Correction For Integrated Phased Arrays
Abstract
Achieving long-distance, high data-rate wireless connections at the 5G millimeter-wave (mm-wave) frequency bands requires ultra-low-jitter local oscillators (LOs) [1]–[3] and phased-arrays with very accurate beam-steering capability [4], [5]. In regard to jitter, digital bang-bang phase-locked loops (BBPLLs) have been recently shown as capable of satisfying the very stringent requirements, while at the same time occupying less area than their analog counterparts [3]. This makes them particularly well-suited to the so-called localized LO-generation approach, where a synthesizer is placed in each of the individual transceiver elements, to avoid routing of a global high-frequency signal across large ICs and to leverage the jitter suppression resulting from an equivalent over-the-air combination of the outputs [1]. To achieve accurate beam-steering with LO phase-shifting, highly linear mm-wave phase-shifters are then conventionally placed on each of the LO signals [4], [5], leading, unfortunately, to a substantial power, noise, and area overhead.
Year
DOI
Venue
2021
10.1109/ISSCC42613.2021.9365972
2021 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC)
DocType
Volume
ISSN
Conference
64
0193-6530
Citations 
PageRank 
References 
0
0.34
0
Authors
15