Name
Affiliation
Papers
RONALD D. BLANTON
Carnegie Mellon Univ, Dept Elect & Comp Engn, Adv Chip Testing Lab, Pittsburgh, PA 15213 USA
23
Collaborators
Citations 
PageRank 
42
253
26.57
Referers 
Referees 
References 
448
565
276
Search Limit
100565
Title
Citations
PageRank
Year
Characterization of Locked Sequential Circuits via ATPG10.362019
Back-End Layout Reflection for Test Chip Design00.342018
A Learning-Based Approach to Secure JTAG Against Unseen Scan-Based Attacks.00.342016
Special session: Hot topics: Statistical test methods00.342015
Efficient built-in self test of regular logic characterization vehicles30.432015
Improving accuracy of on-chip diagnosis via incremental learning30.392015
Statistical Learning in Chip (SLIC)10.362015
PADRE: Physically-Aware Diagnostic Resolution Enhancement70.532013
Slider: A Fast And Accurate Defect Simulation Framework50.502011
Systematic defect identification through layout snippet clustering180.902010
Automatic classification of bridge defects90.572010
Estimating Defect-Type Distributions Through Volume Diagnosis And Defect Behavior Attribution100.632010
Test Effectiveness Evaluation Through Analysis Of Readily-Available Tester Data20.372009
An Effective And Flexible Multiple Defect Diagnosis Methodology Using Error Propagation Analysis220.822008
Improving The Accuracy Of Test Compaction Through Adaptive Test Update10.382008
A Logic Diagnosis Methodology For Improved Localization And Extraction Of Accurate Defect Behavior542.152006
Diagnostic Test Generation For Arbitrary Faults190.992006
Fault Tuples in Diagnosis of Deep-Submicron Circuits160.762002
False coupling interactions in static timing analysis171.022001
MEMS fault model generation using CARAMEL82.151998
Failure modes for stiction in surface-micromachined MEMS92.501998
To DFT or Not to DFT?203.291997
Development of a MEMS testing methodology286.471997