Author Info
Name
Affiliation
Papers
SHIZUNORI MATSUMOTO
Sony LSI Design Japan, 4-16-1 Okada, Atsugi, Kanagawa 2430021, Japan
2
Collaborators
Citations 
PageRank 
17
6
0.99
Referers 
Referees 
References 
30
33
4
Title
Citations
PageRank
Year
Design and Performance of a 1 ms High-Speed Vision Chip with 3D-Stacked 140 GOPS Column-Parallel PEs.00.342018
4.9 A 1ms high-speed vision chip with 3D-stacked 140GOPS column-parallel PEs for spatio-temporal image processing60.662017