Name
Title | ||
|---|---|---|
Design and Performance of a 1 ms High-Speed Vision Chip with 3D-Stacked 140 GOPS Column-Parallel PEs. |
Abstract | ||
|---|---|---|
We have developed a high-speed vision chip using 3D stacking technology to address the increasing demand for high-speed vision chips in diverse applications. The chip comprises a 1/3.2-inch, 1.27 Mpixel, 500 fps (0.31 Mpixel, 1000 fps, 2 x 2 binning) vision chip with 3D-stacked column-parallel Analog-to-Digital Converters (ADCs) and 140 Giga Operation per Second (GOPS) programmable Single Instruction Multiple Data (SIMD) column-parallel PEs for new sensing applications. The 3D-stacked structure and column parallel processing architecture achieve high sensitivity, high resolution, and high-accuracy object positioning. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.3390/s18051313 | SENSORS |
Keywords | Field | DocType |
vision chip,high-speed image sensor,detection,tracking | Flight dynamics (spacecraft),Vision chip,High speed vision,Giga-,SIMD,Converters,Chip,Electronic engineering,Engineering,Computer hardware,Stacking | Journal |
Volume | Issue | Citations |
18 | 5.0 | 0 |
PageRank | References | Authors |
0.34 | 1 | 15 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Atsushi Nose | 1 | 6 | 1.33 |
| Tomohiro Yamazaki | 2 | 6 | 1.67 |
| Hironobu Katayama | 3 | 6 | 0.99 |
| Shuji Uehara | 4 | 6 | 0.99 |
| Masatsugu Kobayashi | 5 | 6 | 0.99 |
| Sayaka Shida | 6 | 8 | 1.75 |
| Masaki Odahara | 7 | 6 | 0.99 |
| Kenichi Takamiya | 8 | 20 | 5.25 |
| Shizunori Matsumoto | 9 | 6 | 0.99 |
| Leo Miyashita | 10 | 23 | 7.13 |
| Yoshihiro Watanabe | 11 | 125 | 17.03 |
| Takashi Izawa | 12 | 8 | 1.73 |
| yoshinori muramatsu | 13 | 38 | 10.24 |
| yoshikazu nitta | 14 | 38 | 10.89 |
| Masatoshi Ishikawa | 15 | 903 | 163.13 |