Name
Abstract | ||
|---|---|---|
Self-timed systems structured as multiple concurrent processes and communicating through self-timed queues are a convenient way to implement decoupled computer architectures. Machines of this type can exploit instruction level parallelism in a natural way, and can be easily modified and extended. However, providing a precise exception model for a self-timed micropipelined processor can be difficult, since the processor state does not change at uniformly discrete intervals. We present a precise exception method implemented for Fred, a self-timed, decoupled, pipelined computer architecture with out-of-order instruction completion. |
Year | DOI | Venue |
|---|---|---|
1995 | 10.1109/ICCD.1995.528787 | ICCD |
Keywords | Field | DocType |
exception handling,parallel architectures,self-adjusting systems,Fred,decoupled computer architectures,instruction level parallelism,micropipelined processor,multiple concurrent processes,out-of-order instruction completion,pipelined computer architecture,precise exception handling,self-timed processor,self-timed queues,self-timed systems | Instruction-level parallelism,Computer science,Exception handling,Parallel computing,Queue,Parallel processing,Real-time computing,Exploit,Electronic circuit,Out-of-order execution,Embedded system | Conference |
ISBN | Citations | PageRank |
0-8186-7165-3 | 4 | 0.46 |
References | Authors | |
3 | 2 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| William F. Richardson | 1 | 15 | 1.34 |
| Erik Brunvand | 2 | 509 | 66.09 |