Title
Simulation Analysis on the Impact of Furnace Batch Size Increase in a Deposition Loop
Abstract
In the dynamic environment of semiconductor manufacturing operations, a bottleneck could be created at the bake furnaces of the deposition loop as capacity expands. Upgrading of the bake furnaces by adding a lot-per-batch in the boat or purchasing a new furnace are two possible solutions to this problem. A simulation model was constructed to assist the decision making, with the behavior of the wet benches (upstream tools) and cluster tools (downstream tools) being modeled in detail. We concluded that a limited number of furnaces upgrade is sufficient to sustain the capacity expansion. But the bottleneck was shifted to an upstream tool, which required the backup tool to be activated to manage the queue. A loading policy that constrains batches to queue at maximum time before loading into the furnaces has to be implemented to balance the efficiency at the furnaces and their downstream tools, without compromising on the cycle time
Year
DOI
Venue
2006
10.1109/WSC.2006.322961
Winter Simulation Conference
Keywords
Field
DocType
coating techniques,furnace batch size,cluster tools,furnaces,discrete event simulation,integrated circuit manufacture,deposition loop,simulation analysis,furnace batch size increase,cluster tool,integrated circuit metallisation,wet benches,bake furnace,furnaces upgrade,loading policy,bake furnaces,semiconductor manufacturing operations,capacity expansion,cycle time,backup tool,downstream tool,upstream tool,maximum time,simulation model,semiconductor manufacturing
Bottleneck,Computer science,Simulation,Queue,Semiconductor device fabrication,Upgrade,Size increase,Purchasing,Backup,Discrete event simulation
Conference
ISBN
Citations 
PageRank 
1-4244-0501-7
4
0.52
References 
Authors
4
6
Name
Order
Citations
PageRank
Boon Ping Gan132934.25
Peter Lendermann221925.96
Kelvin Paht Te Quek340.52
Bart van der Heijden440.52
Chen Chong Chin540.52
Choon Yap Koh640.52