Title
Efficient architecture and hardware implementation of the Whirlpool hash function
Abstract
The latest cryptographical applications demand both high speed and high security. In this paper, an architecture and VLSI implementation of the newest powerful standard in the hash families, Whirlpool, is presented. It reduces the required hardware resources and achieves high-speed performance. The architecture permits a wide variety of implementation tradeoffs. The implementation is examined and compared in the security level and in the performance by using hardware terms. This is the first Whirlpool implementation allowing fast execution, and effective substitution of any previous hash families' implementations such as MD5, RIPEMD-160, SHA-1. SHA-2 etc, in any cryptography application.
Year
DOI
Venue
2004
10.1109/TCE.2004.1277864
IEEE Trans. Consumer Electronics
Keywords
Field
DocType
Hardware,Cryptography,Very large scale integration,Information security,Consumer electronics,National security,Laboratories,ISO standards,IEC standards,Wire
Architecture,Cryptography,Computer science,Implementation,Hash function,Computer hardware,MD5,Very-large-scale integration,Whirlpool,Embedded system,Secure Hash Algorithm
Journal
Volume
Issue
ISSN
50
1
0098-3063
Citations 
PageRank 
References 
10
0.96
1
Authors
2
Name
Order
Citations
PageRank
P. Kitsos113015.47
O. Koufopavlou225628.43