Title | ||
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A Configurable Pipelined State Machine as a Hybrid ASIC and Configurable Architecture |
Abstract | ||
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We present a configurable FSM where all units relevant for control and transition logic are configurable while the basic structural components like state registers are built of fixed logic. Implemented as part of an ASIC, FSMs are efficient and fast, but inflexible. When realized using FPGA hardware, they are very flexible but inefficient in terms of area and speed. We describe the architecture of a combined approach faster and smaller than an FPGA implementation while providing full programmability. |
Year | DOI | Venue |
---|---|---|
2004 | 10.1109/ISVLSI.2004.1339551 | IEEE Computer Society Annual Symposium on VLSI |
Keywords | Field | DocType |
application specific integrated circuits,state machine,field programmable gate arrays,finite state machines | Architecture,Computer science,Programmable logic array,Field-programmable gate array,Application-specific integrated circuit,Finite-state machine,Register-transfer level,Reconfigurable computing,Embedded system,Programmable logic device | Conference |
ISSN | Citations | PageRank |
2159-3469 | 0 | 0.34 |
References | Authors | |
1 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Peter Zipf | 1 | 186 | 45.00 |
Claude Stötzler | 2 | 0 | 0.68 |
Manfred Glesner | 3 | 1121 | 255.04 |