Name
Title | ||
|---|---|---|
Architecture Support and Comparison of Three Memory Consistency Models in NoC Based Systems |
Abstract | ||
|---|---|---|
We propose a novel hardware support for three relaxed memory models, Release Consistency (RC), Partial Store Ordering (PSO) and Total Store Ordering (TSO) in Network-on-Chip (NoC) based distributed shared memory multicore systems. The RC model is realized by using a Transaction Counter and an Address Stack based approach to enforce the required global orders on the shared memory operations. The PSO and TSO models are realized by using a Write Transaction Counter and a Write Address Stack based approach to enforce the required global orders on the shared memory operations. In the experiments, we use a configurable platform based on a 2D mesh NoC using deflection routing policy. The results show that under synthetic workloads, the average execution time for the RC, PSO and TSO models in 8x8 network (64 cores) is reduced by 35.8%, 22.7% and 16.5% over the sequential consistency (SC) model, respectively. The average speedup for the RC, PSO and TSO models in 8x8 network under different application workloads is increased by 34.3%, 10.6% and 8.9% over the SC model, respectively. The area cost for the TSO, PSO and RC models is increased by less than 2% over the SC model at the interface to the processor. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1109/DSD.2012.27 | DSD |
Keywords | DocType | Citations |
multiprocessing systems,network routing,network-on-chip,random-access storage,2D mesh NoC based systems,PSO models,RC model,SC model,TSO models,address stack based approach,architecture support,deflection routing policy,distributed shared memory multicore systems,memory consistency models,network-on-chip based systems,partial store ordering,relaxed memory models,release consistency,sequential consistency model,shared memory operations,total store ordering,transaction counter,write address stack based approach,write transaction counter,Distributed shared memory,Memory consistency,Network-on-Chip,Release consistency,Scalability | Conference | 1 |
PageRank | References | Authors |
0.34 | 0 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Abdul Naeem | 1 | 11 | 2.25 |
| Axel Jantsch | 2 | 1875 | 169.83 |
| Zhonghai Lu | 3 | 1063 | 100.12 |