Name
Title | ||
|---|---|---|
Performance optimization of embedded applications in a hybrid reconfigurable platform |
Abstract | ||
|---|---|---|
This work presents an extensive study on the speedups achieved by mapping real-life applications in different instances of a hybrid reconfigurable system. The embedded heterogeneous system is composed by reconfigurable hardware units of different granularity. The fine-grain reconfigurable logic is realized by an FPGA, while the coarse-grain reconfigurable hardware by a 2- Dimensional array of word-level Processing Elements. Performance gains are achieved by mapping time critical loops, which execute slowly on the FPGA, on the Coarse-Grain Reconfigurable Array. An automated design flow was developed for mapping applications on the reconfigurable units of the platform. The conducted experiments illustrate that the speedups relative to an all-FPGA execution range from 2.33 to 6.42 being close to theoretical speedup bounds. |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1007/978-3-540-74442-9_34 | PATMOS |
Keywords | Field | DocType |
mapping application,different granularity,performance optimization,fine-grain reconfigurable logic,reconfigurable unit,reconfigurable hardware unit,embedded heterogeneous system,coarse-grain reconfigurable hardware,hybrid reconfigurable system,mapping time critical loop,embedded application,hybrid reconfigurable platform,different instance,reconfigurable hardware,2 dimensional | Computer architecture,Computer science,Embedded applications,Field-programmable gate array,Design flow,Real-time computing,Logic block,Granularity,Time critical,Reconfigurable computing,Speedup | Conference |
Volume | ISSN | ISBN |
4644 | 0302-9743 | 3-540-74441-X |
Citations | PageRank | References |
0 | 0.34 | 8 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Michalis D. Galanis | 1 | 94 | 15.60 |
| Gregory Dimitroulakos | 2 | 47 | 7.14 |
| Costas E Goutis | 3 | 186 | 25.76 |