Title
Building-up of system level ESD modeling: Impact of a decoupling capacitance on ESD propagation.
Abstract
Résumé We present a methodology for precise measurements and simulations of ESD system level stress applied to a simple printed circuit board. The impact of an external decoupling capacitance on the ESD propagation paths into an Integrated Circuit (IC) is demonstrated. Resulting current and voltage waveforms are analyzed to highlight the interactions between IC and components (including package, PCB and ESD protections).
Year
DOI
Venue
2013
10.1016/j.microrel.2012.04.012
Microelectronics Reliability
Keywords
Field
DocType
electrostatic discharge,integrated circuits,printed circuits,ESD propagation,ESD protections,ESD system level stress,IC,PCB,current waveforms,decoupling capacitance,printed circuit board,system level ESD modeling,voltage waveforms
Capacitance,Electrostatic discharge,Voltage,Waveform,Decoupling (cosmology),Printed circuit board,Electronic engineering,Engineering,Electrical engineering,Integrated circuit,System level
Journal
Volume
Issue
ISSN
53
2
0026-2714
ISBN
Citations 
PageRank 
978-1-58537-182-2
1
0.48
References 
Authors
1
5
Name
Order
Citations
PageRank
Nicolas Monnereau110.48
Fabrice Caignet2797.99
David Trémouilles3138.69
Nicolas Nolhier442.28
M. Bafleur577.06