Abstract | ||
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The aim of this paper is to study the influence of processor mapping on message passing performance of two different parallel computers: the Cray T3E and the SGI Origin 2000. For this purpose, we have first designed an experiment where processors are paired off in a random manner and messages are exchanged between them. In view of the results of this experiment, it is obvious that the physical placement must be accounted for. Consequently, a mapping algorithm for the Cray T3E, suited cartesian topologies is studied. We conclude by making comparisons between our T3E algorithm, the MPI default mapping and another algorithm proposed by Müller and Resch in [9]. |
Year | DOI | Venue |
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2000 | 10.1007/3-540-44520-X_27 | Euro-Par |
Keywords | Field | DocType |
t3e algorithm,cray t3e message-passing performance,pe mapping,mpi default mapping,random manner,different parallel computer,processor mapping,sgi origin,physical placement,mapping algorithm,cartesian topology,cray t3e,message passing,parallel computer | Computer science,Parallel computing,Network topology,Processor mapping,Mapping algorithm,Cray t3e,Message passing,Cartesian coordinate system,Distributed computing | Conference |
Volume | ISSN | ISBN |
1900 | 0302-9743 | 3-540-67956-1 |
Citations | PageRank | References |
7 | 0.68 | 5 |
Authors | ||
4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Eduardo Huedo | 1 | 621 | 43.99 |
Manuel Prieto | 2 | 349 | 31.23 |
Ignacio Martín Llorente | 3 | 406 | 38.44 |
Francisco Tirado | 4 | 404 | 32.26 |