Name
Title | ||
|---|---|---|
Trade-off analysis between timing error rate and power dissipation for adaptive speed control with timing error prediction |
Abstract | ||
|---|---|---|
Timing margin of a chip varies chip by chip due to manufacturing variability, and depends on operating environ- ment and aging. Adaptive speed control with timing error predic- tion is a promising approach to mitigate the timing margin vari- ation, whereas it inherently has a critical risk of timing error oc- currence when a circuit is slowed down. This paper presents how to evaluate the relation between timing error rate and power dis- sipation in self-adaptive circuits with timing error prediction. The discussion is experimentally validated using a 32-bit ripple carry adder in subthreshold operation in a 90nm CMOS process. We show a trade-off between timing error rate and power dissipation, and reveal the dependency of the trade-off on design parameters. |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1145/1509633.1509706 | Asia and South Pacific Design Automation Conference |
Keywords | Field | DocType |
timing error rate,adaptive speed control,cmos process,power dissipation,critical risk,trade-off analysis,32-bit ripple,timing margin,timing margin variation,timing error occurrence,timing error prediction,speed control,ripple carry adder,adaptive control,chip,3d,cmos integrated circuits,error rate | Timing margin,Adder,Computer science,Dissipation,Real-time computing,Chip,Electronic engineering,Static timing analysis,Subthreshold conduction,Adaptive control,Electronic speed control | Journal |
Volume | Issue | ISSN |
92-A | 12 | 0916-8508 |
Citations | PageRank | References |
12 | 1.11 | 4 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hiroshi Fuketa | 1 | 99 | 15.37 |
| Masanori Hashimoto | 2 | 462 | 79.39 |
| Yukio Mitsuyama | 3 | 134 | 20.01 |
| Takao Onoye | 4 | 329 | 68.21 |