Name
Title | ||
|---|---|---|
Minimizing Peak Power For Application Chains On Architectures With Partial Dynamic Reconfiguration |
Abstract | ||
|---|---|---|
Power consumption is a key concern on modern reconfigurable architectures. In this paper, we address the problem of minimizing peak power while mapping application task chains onto reconfigurable architectures with partial dynamic reconfiguration capability. Our proposed methodology minimizes peak power for a given timing constraint. It is based on de tailed data-parallelism considerations to ensure that tight timing constraints are met. Our methodology generates physically placed task execution schedules and includes selection of a suitable number of data-parallel instances for each task, a suitable dock frequency, and execution workload for each task instance. Case studies on real image-filtering applications demonstrate that our approach results in significant peak power savings (between 40%-50%) for tight as well as relaxed timing constraints. |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/FPT.2006.270326 | 2006 IEEE International Conference on Field Programmable Technology, Proceedings |
Keywords | Field | DocType |
data parallelism,relaxation time,image processing | Workload,Computer science,Parallel computing,Image processing,Real-time computing,Schedule,Data parallelism,Control reconfiguration,Clock rate,Power consumption | Conference |
Citations | PageRank | References |
1 | 0.35 | 5 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Sudarshan Banerjee | 1 | 271 | 14.83 |
| Elaheh Bozorgzadeh | 2 | 630 | 37.93 |
| Juanjo Noguera | 3 | 289 | 24.81 |
| Nikil Dutt | 4 | 4960 | 421.49 |