Name
Title | ||
|---|---|---|
A Digital Fractional-N PLL With a PVT and Mismatch Insensitive TDC Utilizing Equivalent Time Sampling Technique |
Abstract | ||
|---|---|---|
A 6-bit time-to-digital converter that achieves mismatch free operation by using a single delay cell and sampling flip-flop is presented. The proposed TDC was integrated in a digital fractional-N PLL fabricated in a 32-nm digital SoC CMOS process for WiFi/WiMax radios. The TDC consumes 3 mW from a 1.05-V supply and occupies an area of 0.004 mm2. A digital frequency-locked loop is used to track and correct for PVT variations in the TDC and no additional linearization or mismatch calibrations are required. The DPLL uses a 20-bit high dynamic range DAC to drive a VCO in order to effectively realize a DCO with 100-Hz frequency resolution. The 2.5-GHz WiFi band LO output is generated from a 40-MHz reference with an integrated phase noise of - 35 dBc (10 kHz to 10 MHz) while consuming 21 mW . The worst case spur in the LO output is below - 50 dBc without requiring TDC mismatch and linearity calibration. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/JSSC.2013.2253407 | J. Solid-State Circuits |
Keywords | Field | DocType |
wifi radio,pvt,cmos integrated circuits,equivalent time sampling technique,calibration,wimax,digital soc cmos process,word length 6 bit,voltage-controlled oscillators,power 21 mw,time-to-digital converter,dco,linearity calibration,digital fractional-n pll,tdc,wimax radio,word length 20 bit,system-on-chip,single delay cell,wifi,phase locked loops,vco,dpll,frequency 10 khz to 10 mhz,size 32 nm,mismatch insensitive tdc,frequency 2.5 ghz,time-digital conversion,phase noise,dac,voltage 1.05 v,flip-flops,integrated phase noise,frequency 100 hz,wireless lan,fractional-n,flip-flop sampling,computer architecture,system on chip,time to digital converter,shift registers | Phase-locked loop,Computer science,Phase noise,Voltage-controlled oscillator,CMOS,Electronic engineering,DPLL algorithm,dBc,High dynamic range,Time-to-digital converter | Journal |
Volume | Issue | ISSN |
48 | 7 | 0018-9200 |
Citations | PageRank | References |
8 | 0.68 | 9 |
Authors | ||
8 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hyung Seok Kim | 1 | 544 | 56.03 |
| Carlos Ornelas | 2 | 8 | 1.35 |
| Kailash Chandrashekar | 3 | 47 | 7.21 |
| Dan Shi | 4 | 17 | 3.23 |
| Pin-En Su | 5 | 25 | 4.13 |
| Paolo Madoglio | 6 | 91 | 13.34 |
| Yee William Li | 7 | 20 | 2.27 |
| Ashoke Ravi | 8 | 176 | 26.87 |