| A Cellular Multiband DTC-Based Digital Polar Transmitter With −153-dBc/Hz Noise in 14-nm FinFET | 0 | 0.34 | 2020 |
| Transformer-Combining Digital PA with Efficiency Peaking at 0, −6, and −12 dB Backoff in 32nm CMOS | 0 | 0.34 | 2020 |
| A Cellular Multiband DTC-Based Digital Polar Transmitter With −153 dBc/Hz Noise in 14-nm FinFET | 0 | 0.34 | 2019 |
| 13.6 A 2.4GHz WLAN digital polar transmitter with synthesized digital-to-time converter in 14nm trigate/FinFET technology for IoT and wearable applications. | 2 | 0.44 | 2017 |
| A Digital Fractional-N PLL With a PVT and Mismatch Insensitive TDC Utilizing Equivalent Time Sampling Technique | 8 | 0.68 | 2013 |
| A 2.4-GHz 20-40-MHz Channel WLAN Digital Outphasing Transmitter Utilizing a Delay-Based Wideband Phase Modulator in 32-nm CMOS. | 11 | 0.83 | 2012 |
| A digital fractional-N PLL with a 3mW 0.004mm2 6-bit PVT and mismatch insensitive TDC. | 0 | 0.34 | 2012 |
| A 32nm CMOS all-digital reconfigurable fractional frequency divider for LO generation in multistandard SoC radios with on-the-fly interference management. | 9 | 1.30 | 2012 |
| A 20dBm 2.4GHz digital outphasing transmitter for WLAN application in 32nm CMOS | 9 | 1.41 | 2012 |
| AD-PLL for WiMAX with digitally-regulated TDC and glitch correction logic | 0 | 0.34 | 2010 |
| Time-to-digital converter for frequency synthesis based on a digital bang-bang DLL | 20 | 1.60 | 2010 |
| A 4.75-GHz Fractional Frequency Divider-by-1.25 With TDC-Based All-Digital Spur Calibration in 45-nm CMOS | 22 | 2.92 | 2009 |
| A 2.5GHz, 6.9mW ΔΣ modulator with standard cell design in 45nm-LP CMOS using time-interleaving | 3 | 0.75 | 2009 |
| Quantization Effects in All-Digital Phase-Locked Loops | 7 | 1.73 | 2007 |
