Daisuke Suzuki - Citegraph

Author Info

Name	Affiliation	Papers
DAISUKE SUZUKI	Tohoku Univ, Ctr Spintron Integrated Syst, Aoba Ku, 2-1-1 Katahira, Sendai, Miyagi 9808577, Japan	16
Collaborators	Citations	PageRank
36	47	7.32
Referers	Referees	References
106	324	106

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100324

Publications (16 rows)

Collaborators (36 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Design and Evaluation of a Synthesizable Standard-Cell-Based Nonvolatile FPGA	0	0.34	2020
Circuit optimization technique of nonvolatile logic-in-memory based lookup table circuits using magnetic tunnel junction devices.	0	0.34	2019
12.1 An FPGA-Accelerated Fully Nonvolatile Microcontroller Unit for Sensor-Node Applications in 40nm CMOS/MTJ-Hybrid Technology Achieving 47.14μW Operation at 200MHz	1	0.42	2019
A 47.14-$\Mu\Text{W}$ 200-Mhz Mos/Mtj-Hybrid Nonvolatile Microcontroller Unit Embedding Stt-Mram And Fpga For Iot Applications	0	0.34	2019
Design of an MTJ-Based Nonvolatile LUT Circuit with a Data-Update Minimized Shift Operation for an Ultra-Low-Power FPGA: (Abstract Only).	0	0.34	2018
Three-terminal MTJ-based nonvolatile logic circuits with self-terminated writing mechanism for ultra-low-power VLSI processor.	0	0.34	2017
Energy-Efficient and Highly-Reliable Nonvolatile FPGA Using Self-Terminated Power-Gating Scheme	0	0.34	2017
Standby-Power-Free Integrated Circuits Using MTJ-Based VLSI Computing.	5	0.52	2016
A low-power MTJ-based nonvolatile FPGA using self-terminated logic-in-memory structure	2	0.46	2016
Design of an MTJ-based nonvolatile lookup table circuit using an energy-efficient single-ended logic-in-memory structure	3	0.44	2015
Nonvolatile Logic-in-Memory LSI Using Cycle-Based Power Gating and its Application to Motion-Vector Prediction	12	0.65	2015
Spintronics-based nonvolatile logic-in-memory architecture towards an ultra-low-power and highly reliable VLSI computing paradigm	4	0.42	2015
Fabrication of a 3000-6-input-LUTs embedded and block-level power-gated nonvolatile FPGA chip using p-MTJ-based logic-in-memory structure	8	0.51	2015
A Compact Low-Power Nonvolatile Flip-Flop Using Domain-Wall-Motion-Device-Based Single-Ended Structure	0	0.34	2014
Fabrication Of A Magnetic Tunnel Junction-Based 240-Tile Nonvolatile Field-Programmable Gate Array Chip Skipping Wasted Write Operations For Greedy Power-Reduced Logic Applications	9	1.06	2013
Area-efficient LUT circuit design based on asymmetry of MTJ's current switching for a nonvolatile FPGA	3	0.46	2012

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