Name
Abstract | ||
|---|---|---|
In view of changing the type of energy conversion in CMOS circuits, this paper investigates low power CMOS circuit design,
which adopts a gradually changing power clock. First, we discuss the algebraic expressions and the corresponding properties
of clocked power signals. Then the design procedure is summed up for converting complementary CMOS logic gates employing DC
power to the power-clocked CMOS gates employing AC power. On this basis, the design of differential cascode voltage switch
logic (DCVSL) circuits employing AC power clocks is proposed. The PSPICE simulations using a sinusoidal power-clock demonstrate
that the designed power-clocked DCVSL circuit has a correct logic function and low power characteristics. Finally, an interface
circuit to convert clocked signals into the standard logic levels of a CMOS circuit is proposed, and its validity is verified
by computer simulations. |
Year | DOI | Venue |
|---|---|---|
2002 | 10.1360/02yf9021 | Science in China Series F: Information Sciences |
Keywords | DocType | Volume |
: vlsi design,clocked dcvsl circuit.,ac power,low power technique,computer simulation,vlsi design,circuit design,logic gate,energy conversion | Journal | 45 |
Issue | Citations | PageRank |
3 | 0 | 0.34 |
References | Authors | |
3 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Xunwei Wu | 1 | 29 | 7.88 |
| Guoqiang Hang | 2 | 7 | 5.83 |
| Massoud Pedram | 3 | 7801 | 1211.32 |