Guoqiang Hang - Citegraph

Author Info

Name	Affiliation	Papers
GUOQIANG HANG	Zhejiang University Department of Information and Electronic Engineering 310027 Hangzhou China	16
Collaborators	Citations	PageRank
23	7	5.83
Referers	Referees	References
17	102	55

Search Limit

100102

Publications (16 rows)

Collaborators (23 rows)

Referers (17 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
NORA circuit design using neuron-MOS transistors	0	0.34	2014
Neuron-MOS-based Dynamic Circuits for Multiple-Valued Logic	1	0.38	2014
Design of Dynamic Digital Circuits with n-Channel Multiple-Input Floating-Gate Transistors	0	0.34	2014
Design of ternary D flip-flop using one latch with neuron-MOS literal circuit	0	0.34	2013
Quaternary edge-triggered flip-flop with neuron-MOS literal circuit	0	0.34	2013
Ternary Schmitt Circuit Based On Neuron-Mos Transistor	0	0.34	2013
An Enhanced Dynamic Switch Logic with Floating-Gate MOS Transistors	0	0.34	2013
A clocked differential switch logic using floating-gate MOS transistors	2	0.45	2013
Novel Differential Flip-Flops Using Neuron-MOS Transistors	0	0.34	2013
Differential Edge-Triggered Flip-Flops Using Neuron-MOS Transistors	1	0.39	2013
The design of Neural A/D converter using neuron-MOS transistor	1	0.42	2012
Neuron-MOS Based Schmitt Trigger with Controllable Hysteresis	1	0.40	2012
A Hamming neural network integrated circuit using neuron-MOS transistor.	0	0.34	2011
Adiabatic CMOS gate and adiabatic circuit design for low-power applications	1	0.42	2005
Low power DCVSL circuits employing AC power supply.	0	0.34	2002
Design technique of I2L circuits based on multi-valued logic.	0	0.34	1996

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