Title
Low-cost FPGA stereo vision system for real time disparity maps calculation
Abstract
Several applications demand efficient hardware implementations of stereo vision systems in order to furnish real time three-dimensional measurements. This paper proposes a complete fast low-cost stereo vision system that performs stereo image rectification with tangential and radial distortion removal, computes dense disparity maps using the Sum of Absolute Differences as the dissimilarity metric, and, finally, exploits a novel injective consistency check purpose-designed for eliminating unreliable disparity values. The proposed system has been realized and hardware tested for several images resolutions and disparity ranges. When 1280x720 grayscale images are processed with the disparity range equal to 30, the system allows a frame rate up to 97fps@89MHz to be reached. It has been realized on a single low-cost XilinxVirtex-4 XC4VLX60 FPGA chip and it occupies 63 DSPs, 128 BRAMs and 15728 slices.
Year
DOI
Venue
2012
10.1016/j.micpro.2012.02.014
Microprocessors and Microsystems - Embedded Hardware Design
Keywords
Field
DocType
efficient hardware implementation,unreliable disparity value,complete fast low-cost stereo,images resolution,real time disparity map,stereo image rectification,stereo vision system,proposed system,vision system,computes dense disparity map,disparity range,low-cost fpga stereo vision,fpga,stereo vision
Distortion (optics),Computer vision,Injective function,Computer science,Stereopsis,Field-programmable gate array,Frame rate,Artificial intelligence,Sum of absolute differences,Grayscale,Computer stereo vision
Journal
Volume
Issue
ISSN
36
4
0141-9331
Citations 
PageRank 
References 
9
0.48
15
Authors
4
Name
Order
Citations
PageRank
Paolo Zicari1545.82
Stefania Perri226433.11
Pasquale Corsonello327838.06
Giuseppe Cocorullo410617.00