Name
Abstract | ||
|---|---|---|
This paper provides an overview of the Parallel Architecture Core (PAC) project led by SoC Technology Center of Industrial Technology Research Institute (STC/ITRI) in Taiwan. The background of PAC project, a brief introduction to PAC core technologies, PAC SoC development suite, PAC benchmarks, and applications are presented. The main objective of the PAC development plan is to enhance industrial development competitiveness in the core technology related to key components, especially for portable multimedia applications. |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/ICME.2006.262455 | ICME |
Keywords | Field | DocType |
digital signal processing,assembly,programming,embedded systems,system on chip,benchmark,vliw,energy management,kernel | Energy management,Digital signal processing,System on a chip,Industrial technology,Suite,Development plan,Computer science,Very long instruction word,Embedded system,Parallel architecture | Conference |
ISBN | Citations | PageRank |
1-4244-0367-7 | 21 | 1.67 |
References | Authors | |
1 | 6 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| David Chih-Wei Chang | 1 | 32 | 2.27 |
| I-Tao Liao | 2 | 21 | 1.67 |
| Jenq Kuen Lee | 3 | 459 | 48.71 |
| Wen-Feng Chen | 4 | 21 | 1.67 |
| Shau-Yin Tseng | 5 | 173 | 24.85 |
| Chein-Wei Jen | 6 | 588 | 68.52 |