Name
Abstract | ||
|---|---|---|
The error masking in conventional built-in self-test schemes is known to be around 2-m when the output data is compacted in an m-bit multi-input linear feedback shift register. In the recent years, several schemes have been proposed which claim to reduce the error masking in a significant way while maintaining the need for a small overhead. In this paper, a completely new scheme for reducing error masking is proposed. Unlike the previous schemes in the literature, the new scheme is circuit-dependent and uses the concept of output data modification. This concept suggests modifying the original test output sequence before compaction, in order to obtain a new sequence with a reduced error masking probability. It is shown that the output data modification scheme provides a simple trade-off between the desired error masking which could run into (21thousands) and the area overhead needed (which would usually be equal to a 16 or 32 bit multi-input linear feedback shift register) for this masking. Finally, a formal proof is presented which establishes that despite circuit-dependency, the proposed scheme will on the average always lead to the desired error masking. |
Year | DOI | Venue |
|---|---|---|
1990 | 10.1007/BF00134015 | J. Electronic Testing |
Keywords | Field | DocType |
Built-in self-test,error masking,improving fault coverage,output data compaction | 32-bit,Linear feedback shift register,Masking (art),Soft error,Computer science,Electronic engineering,Real-time computing,Formal proof,Built-in self-test | Journal |
Volume | Issue | Citations |
1 | 1 | 20 |
PageRank | References | Authors |
2.78 | 12 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Y. Zorian | 1 | 499 | 47.97 |
| V. K. Agarwal | 2 | 360 | 44.82 |