Title
Multi-Phase Rotary Clock Synchronization of Level-Sensitive Circuits
Abstract
Resonant clocking technologies provide clock networks with improved frequency, jitter and power dissipation characteristics, however, often require novel automation routines. Resonant rotary clocking technology, for instance, entails multi-phase and nonzero clock skew operation and supports latch-based design. This paper studies the effects of multi-phase synchronization schemes on the minimum clock period for rotary-clock-synchronized circuits, which necessitate the application of clock skew scheduling and employ level-sensitive registers. In experimentation, single, dual, three- nd four-phase clocking schemes generated by rotary clock synchronization are applied to a suite of level-sensitive-transformed ISCAS'89 benchmarks. Average clock period improvements of 30.3%, 24.8%, 17.7% and 12.0%, respectively, are observed on average compared to the flip-flop based, zero clock skew circuits. As the number of clock phases increases, smaller improvements are observed due to lesser overall effectiveness of the complementary effects of clock skew scheduling and time borrowing. It is shown, however, that for some circuits (23% of the benchmarks), multi-phase synchronization leads to significant performance benefits in operating frequency.
Year
DOI
Venue
2009
10.1142/S0218126609005423
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS
Keywords
Field
DocType
Clock skew,resonant rotary clocking,time borrowing,multi-phase synchronization
Timing failure,Clock gating,Computer science,Clock domain crossing,Electronic engineering,Clock synchronization,Clock skew,Digital clock manager,CPU multiplier,Clock angle problem
Journal
Volume
Issue
ISSN
18
5
0218-1266
Citations 
PageRank 
References 
2
0.38
6
Authors
2
Name
Order
Citations
PageRank
Baris Taskin122740.82
Ivan S. Kourtev2567.96