Title
A transaction-based unified simulation/emulation architecture for functional verification
Abstract
A transaction-based layered architecture providing for 100% portability of a C-based testbench between simulation and emulation is proposed. Transaction-based communication results in performance which is commensurate with emulation without a hardware target. Testbench portability eliminates duplicated effort when combining system level simulation and emulation. An implementation based on the IKOS VStation emulator validates these architectural claims on real designs.
Year
DOI
Venue
2001
10.1145/378239.379036
DAC
Keywords
Field
DocType
architectural claim,real design,system level simulation,transaction-based communication result,hardware target,testbench portability,transaction-based unified simulation,ikos vstation emulator,c-based testbench,transaction-based layered architecture,emulation architecture,functional verification,layered architecture,automatic test equipment,simulation,emulation,controllability,synchronisation,software performance,software testing,high level languages,design for testability,system testing,computer architecture
System-level simulation,Functional verification,Computer architecture,Computer science,Real-time computing,Semulation,Emulation,Platform-based design,Software portability,Multitier architecture,Hardware emulation,Embedded system
Conference
ISSN
ISBN
Citations 
0738-100X
1-58113-297-2
16
PageRank 
References 
Authors
2.48
9
4
Name
Order
Citations
PageRank
Murali Kudlugi1203.11
Soha Hassoun2535241.27
Charles Selvidge33511.28
Duaine Pryor4253.78