Paper Info
Title
Analysis of op-amp phase margin impact on SC SigmaDelta modulator performance
Abstract
The impact of operational amplifier (op-amp) phase margin on switched-capacitor (SC) sigma-delta modulator (ΣΔΜ) performance is investigated in this paper. An ad-hoc integrator settling model is developed and verified by circuit simulations performed in a commercial 0.35μm CMOS technology. The model allows the effect of op-amp phase margin to be taken into account in ΣΔΜ behavioural analysis. Behavioural simulations of a typical single-bit second-order modulator are presented, as an example. As shown, the proposed analysis allows well-found specifications for the op-amp unity-gain frequency, slew rate and phase margin to be defined since the preliminary behavioural simulation phase.
Year
DOI
Venue
2010
10.1016/j.mejo.2010.05.002
Microelectronics Journal
Keywords
DocType
Volume
Sigma-delta modulator,Switched-capacitor (SC) integrator,Behavioural modelling,Operational amplifier (op-amp),Transient response,Settling time
Journal
41
Issue
ISSN
Citations 
7
0026-2692
0
PageRank 
References 
Authors
0.34
0
4
Name
Order
Citations
PageRank
Andrea Pugliese131.56
F. A. Amoroso263.70
Gregorio Cappuccino33610.11
Giuseppe Cocorullo410617.00